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HT16511 1/8 to 1/16 Duty VFD Controller
Features
* Logic voltage: 5V * High-voltage output: VDD-35V max. * Multiple display * 4-bit general purpose input port * No external resistors necessary for driver output
(12-segment & 16-digit to 20-segment & 8-digit)
* 124 matrix key scanning * 8 steps dimmer circuit * 5 LED output ports (20mA max.)
(provides PMOS open-drain and pull-low resistor output)
* Serial interface with MCU (CLK, CS, DI, DO) * 52-pin QFP package
Applications
* Consumer products panel function control * Industrial measuring instrument panel function control * Other similar application panel function control
General Description
HT16511 is a VFD (Vacuum Fluorescent Display) controller/driver that is driven on a 1/8 to 1/16 duty factor. It consists of 12 segment output lines, 8 grid output lines, 8 segment/grid output drive lines, 5 LED output ports, a control circuit, a display memory, and a key scan circuit. Serial data inputs to the HT16511 through a three-line serial interface. This VFD controller/driver is ideal as a peripheral device for an MCU.
Block Diagram
C om m and D ecoder S e r ia l I/F
DI DO CLK CS
D is p la y R A M 2 0 - B it 1 6 W o r d s
2 0 - B it O u tp u t L a tc h
20 8
12
Segm ent D r iv e r
12
S 1 /K 1 ~ S 1 2 /K 1 2
OSC
OSC
T im in g G e n e r a to r K ey S can K e y D a ta R A M (4 1 2 )
D a ta S e le c to r 8 16 8 D im m in g C ir c u it
8
M u ltip le x e d D r iv e r
8
S 1 3 /G 1 6 ~ S 2 0 /G 6
1 6 - B it S h ift R e g is te r
K0~K3 SW 0~SW 3 4 - B it L a tc h 5 - B it L a tc h
G r id D r iv e r
8
G 1~G 8
LED0~LED4
VDD
VSS
VEE
Rev. 1.10
1
September 18, 2003
HT16511
Pin Assignment
L L L L L G G G G G VD ED ED ED ED ED VS OS D C SW 1 SW 2 SW 3 SW 4 DO DI NC CLK CS K0 K1 K2 K3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 52 51 50 49 48 47 46 45 44 43 42 41 40
S 4 5 0 1 2 H T16511 5 2 Q F P -A 3 4 3 1
39 38 37 36 35 34 33 32 31 30 29 28 27
2 G6 G8 S2 S1 VE VD S1 S1 S1 S1 S1 S1 G7 0 /G 9 /G E D 8 /G 7 /G 6 /G 5 /G 4 /G 3 /G 9 10 11 12 13 14 15 16 S 1 2 /K 1 2 S 1 1 /K 1 1 S 1 0 /K 1 0 S 9 /K 9 S 8 /K 8 S 7 /K 7 S 6 /K 6 S 5 /K 5 S 4 /K 4 S 3 /K 3 S 2 /K 2 S 1 /K 1 VDD
Pad Assignment
LED0 50 LED1 LED2 LED3 LED4 VDD VSS 51 OSC 1 2 3 4 5 6 7 8 9 10 11 12 13 VDD S 1 /K 1 S 2 /K 2 S 3 /K 3 S 4 /K 4 S 5 /K 5 S 6 /K 6 S 7 /K 7 S 8 /K 8 S 9 /K 9 S 1 0 /K 1 0 S 1 1 /K 1 1 S 1 2 /K 1 2 14 15 16 17 18 19 20 21 22 23 24 25 26 SW 1 SW 2 SW 3 SW 4 DO DI CLK CS K0 K1 K2 K3 G1 G2 G3 G4 40 45 44 43 42 41 39 38 37 36 35 G5 G6 G7 G8 S 2 0 /G 9 S 1 9 /G 1 0 VEE VDD S 1 8 /G 1 1 S 1 7 /G 1 2 S 1 6 /G 1 3 S 1 5 /G 1 4 S 1 4 /G 1 5 S 1 3 /G 1 6
49
48
47
46
(0 , 0 )
34 33 32 31 30 29 28 27
Chip Size: 103.5 70.5 (mil)2 * The IC substrate should be connected to VSS in the PCB layout artwork.
Rev. 1.10
2
September 18, 2003
HT16511
Pad Coordinates
Pad No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 X -1110.000 -1110.000 -1110.000 -1110.000 -1110.000 -1165.900 -1110.000 -1110.000 -1110.000 -1110.000 -1110.000 -1110.000 -1110.000 -897.200 -782.500 -674.500 -566.500 -458.500 -350.500 -242.500 -134.500 -26.500 81.500 189.500 297.500 405.500 Y 555.300 450.300 345.300 240.300 135.300 9.800 -125.500 -230.500 -335.500 -440.500 -545.500 -650.500 -755.500 -560.300 -560.300 -560.300 -560.300 -560.300 -560.300 -560.300 -560.300 -560.300 -560.300 -560.300 -560.300 -560.300 Pad No. 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 X 977.250 977.250 977.250 977.250 977.250 977.250 977.250 977.250 977.250 977.250 977.250 977.250 977.250 977.250 405.500 297.500 189.500 81.500 -34.700 -173.950 -285.150 -390.150 -501.350 -606.350 -765.200 Y -720.000 -612.000 -504.000 -396.000 -288.000 -180.000 -55.150 49.850 173.350 281.350 389.350 497.350 605.350 713.350 545.400 545.400 545.400 545.400 545.400 684.850 684.850 684.850 684.850 684.850 726.350 Unit: mm
Pin Description
Pin No. 1~4 5 6 7 8 Pin Name SW1~SW4 DO DI NC CLK I/O I O I 3/4 I 4-bit general purpose input port Output serial data at the falling edge of the shift clock, starting from low order bit. This is an NMOS open-drain output pin. Input serial data at the rising edge of the shift clock, starting from the low order bit. No connection Reads serial data at the rising edge, and outputs data at the falling edge. Initializes serial interface at the rising or falling edge of the HT16511. Then it waits to receive a command. Data input after CS has fallen is processed as a command. While command data is processed, current processing is stopped, and the serial interface is initialized. While CS is high, CLK is ignored. Keying data input to these pins is latched at the end of the display cycle. Posistive power supply Segment or key source output pins (dual function). This is PMOS open-drain and pull-low resistor output. Segment or Grid driver output pins. These pins are selectable for segment or grid driving. This is PMOS open-drain and pull-low resistor output. VFD power supply Grid driver output pins (Grid only). This is PMOS open-drain and pull-low resistor output. LED driver output ports. This is a CMOS output pin. Negative power supply, ground Connected to an external resistor or an RC oscillator circuit. Description
9
CS
I
10~13
K0~K3
I 3/4 O O 3/4 O O 3/4 I
14, 33, 45 VDD 15~26 27~32, 35~36 34 37~44 46~50 51 52 S1/K1~S12/K12 S13/G16~S20/G9 VEE G8~G1 LED4~LED0 VSS OSC
Rev. 1.10
3
September 18, 2003
HT16511
Approximate Internal Connections
NMOS OUT
PMOS OUT
V
DD
CMOS OUT
V
DD
V
EE
Absolute Maximum Ratings
Supply Voltage ...........................VSS-0.3V to VSS+6.0V Input Voltage..............................VSS-0.3V to VDD+0.3V Operating Temperature...........................-25C to 75C Storage Temperature ............................-50C to 125C
Note: These are stress ratings only. Stresses exceeding the range specified under Absolute Maximum Ratings may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
D.C. Characteristics
Symbol VDD VEE fOSC RPL IDD IOL IOL1 IOH1 IOH21 IOH22 IOL3 VIH VIL VOH1 VOL1 VOL2 Parameter Logic Supply Voltage VFD Supply Voltage Oscillation Frequency Output Pull-low Resistor Operating Current Driver Leakage Current LED Sink Current LED Source Current Segment/Key Source Current Segment/Grid Source Current DO Sink Current H Input Voltage L Input Voltage High-level Output Voltage Low-level Output Voltage Low-level Output Voltage Test Conditions VDD 3/4 3/4 5V 5V 5V 5V 5V 5V 5V 5V 5V 3/4 3/4 5V 5V 5V ROSC=51kW Driver output No load, VFD display off VO=VDD-30V, VFD driver off VOL=1V, LED0~LED4 VOH=0.9VDD, LED0~LED4 VOH=VDD-2V, S1/K1~S12/K12 VOH=VDD-2V VOL=0.4V 3/4 3/4 LED0~LED4, IOH1=-1mA LED0~LED4, IOL1=20mA DO, IOL2=4mA Conditions 3/4 3/4 Min. 4.5 0 350 50 3/4 3/4 20 -1 -3 -15 4 0.7VDD 0 0.9VDD 0 0 Typ. 5 3/4 500 100 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 Max. 5.5 VDD-35 650 150 5 -10 3/4 3/4 3/4 3/4 3/4 VDD 0.3VDD VDD 1 0.4
Ta=25C Unit V V kHz kW mA mA mA mA mA mA mA V V V V V
Rev. 1.10
4
September 18, 2003
HT16511
A.C. Characteristics
Symbol tPHL tPLH tr1 tr2 tf tmax Ci tCW tSW tSU th tCS tW Fall Time Maximum Clock Frequency Input Capacitance Clock Pulse Width Strobe Pulse Width Data Setup Time Data Hold Time Clock-Strobe Time Wait Time Rise Time 5V 5V 5V 5V 5V 5V 5V 5V 5V 5V Parameter Test Conditions VDD 5V Propagation Delay Time 5V 5V Conditions CLK(R)DO CL=15pF, RL=10kW CL=300pF, S0~S12 CL=300pF, G1~G16 CL=300pF, Sn, Gn Duty=50% 3/4 3/4 3/4 3/4 3/4 CLK rising edge to CS rising edge CLK rising edge to CLK falling edge Min. 3/4 3/4 3/4 3/4 3/4 1 3/4 400 1 100 100 1 1 Typ. 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 3/4 Max. 300 100 2 0.5 120 3/4 15 3/4 3/4 3/4 3/4 3/4 3/4 Ta=25C Unit ns ns ms ms ms MHz pF ns us ns ns ms ms
Functional Description
Display RAM and Display Mode The static display RAM is organized into 408 bits and stores the data transmitted from an external device to the HT16511 through a serial interface. The contents of the RAM are directly mapped to the contents of the VFD driver. Data in the RAM can be accessed through the data setting, address setting and display control commands. It is assigned addresses in 8-bit unit as follows:
SEG1 00 03 06 09 0C 0F 12 15 18 1B 1E 21 24 27 2A 2D H H H H H H H H H H H H H H H H
L
Dimming Control HT16511 provides 8-step dimmer function on display by controlling the 3-bit binary command code. The full pulse width of grid signal is divides into 16 uniform sections by PWM (pulse width modulation) technology. The 16 uniform sections available form 8 steps dimmer via 3-bit binary code. The 8-step dimmer includes 1/16, 2/16, 4/16, 10/16, 11/16, 12/16, 13/16 and 14/16. The 1/16 pulse width indicates minimum lightness. The 14/16 pulse width represents maximum lightness (Refer to the display control command). Key Matrix and Key-Input Data Storage RAM The key matrix scans the series key states at each level of the key strobe signal (S1/K1~S12/K12) output of the HT16511. The key strobe signal outputs are time-multiplexed signals from S1/K1~S12/K12. The states of inputs K0~K3 are sampled by strobe signal S1/K1~S12/K12 and latched into the register.
0 1 2 3 4 5 6
SEG4 00 03 L 06 L 09 L 0C L 0F L 12 L 15 L 18 L 1B L 1E L 21 L 24 L 27 L 2A L 2D L H H H H
H
U
H H H H H H H H H H H
SEG8 0 0 U 0 U 0 U 0 U 1 U 1 U 1 U 1 U 1 U 1 U 2 U 2 U 2 U 2 U 2 U
DH 0H 3H 6H 9H CH FH 2H 5H 8H BH EH
AH
1H 4H 7H
SEG 12 01 L 04 L 07 L 0A L 0D L 10 L 13 L 16 L 19 L 1C L 1F L 22 L 25 L 28 L 2B L 2E L H H H H
H H H H H H H H H H H H
SEG 16 02 U 05 U 08 U 0B U 0E U 11 U 14 U 17 U 1A U 1D U 20 U 23 U 26 U 29 U 2C U 2F U H H H H H H H H H H
H H
H H
H
H
SEG2 D L D L D L D L D L D L D L D L D L D L D L D L D L D L D L D L
0 IG 1 IG 2 IG 3 IG 4 IG 5 IG 6 IG 7 IG 8 IG 9 IG 1 IG 1 IG 1 IG 1 IG 1 IG 1 IG 1
b0
b3b4 b7 XXHL XXHU Lower H ig h e r 4 b its 4 b its
Note:
Only the lower 4 bits of the addresses assigned to SEG17 through SEG20 are valid, the higher 4 bits are ignored.
Rev. 1.10
5
September 18, 2003
HT16511
The key matrix is made up of a 124 matrix, as shown below.
S1/ K1 K0 K1 K2 K3 D e ta il S2/ K2 S3/ K3 S4/ K4 S5/ K5 S6/ K6 S7/ K7 S8/ K8 S9/ K9 S10/ K10 S11/ K11 S12/ K12
K e y m a tr ix
The data of each key is stored as illustrated below, and is read with the read command, starting from the least significant bit.
K0~K3 S 1 /K 1 S 3 /K 3 S 5 /K 5 S 7 /K 7 S 9 /K 9 S 1 0 /K 1 0 K0~K3 S 2 /K 2 S 4 /K 4 S 6 /K 6 S 8 /K 8 S 1 0 /K 1 0 S 1 2 /K 1 2 R e a d in g s e q u e n c e
SW Data The HT16511 provides an extra 4-bit general input port. The SW data is provided with available binary code. The SW data is read with the read command, starting from the least significant bit. Bits 5 through 8 of the SW data are 0.
MSB 0 0 0 0 b3 b2 b1 LSB b0 SW 0 SW 1 SW 2 SW 3
D o n 't c a r e
b0 b1 b2 b3 b4 b5 b6 b7
Commands LED Port The LED port belongs to the CMOS output configuration. Data is written to the LED port with the write command, starting from the least ports least significant bit. In our application (see application circuits), the user adopts an internal NMOS device to a driver LED component by connecting VDD. When a bit of this port is 0, the corresponding LED lights; when the bit is 1, the LED turns off. The data of bits 6 through 8 are ignored.
MSB b4 b3 b2 b1 LSB b0 LED LED LED LED LED 1 2 3 4 0
Commands set the display mode and status of the VFD driver. The first 1 byte input to the HT16511 through the DI pin after the CS pin has fallen, is regarded as a command. If CS is set high while commands/data are transmitted, serial communication is initialized, and the commands/ data being transmitted are not valid (however, the commands/data previously transmitted remains valid).
* Display mode setting commands
D o n 't c a r e
These commands initialize the HT16511 and select the number of segments and the number of grids (1/8~1/16 duty, 12 segments to 20 segments). When these commands are executed, the display is forcibly turned off, and key scanning is also stopped. To resume display, the display command ON must be executed. If the same mode is selected, nothing happens.
Rev. 1.10
6
September 18, 2003
HT16511
MSB 0 0 b3 b2 b1 LSB b0 0xx 100 100 101 101 110 110 111 111 Se x: 0: 1: 0: 1: 0: 1: 0: 1: le c 8 9 1 1 1 1 1 1 1 ts d is p d ig its , d ig its , 0 d ig its 1 d ig its 2 d ig its 3 d ig its 4 d ig its 5 d ig its 6 d ig its la 2 1 , , , , , , , ym 0s 9s 18 17 16 15 14 13 12 o eg eg se se se se se se se de me me gm gm gm gm gm gm gm n ts n ts e n ts e n ts e n ts e n ts e n ts e n ts e n ts
D o n 't c a r e
Note: Power-on status: 16-digit, 12 segment mode is selected.
* Data setting commands
These commands set the data write and data read modes.
MSB 0 1 D o n 't c a r e b3 b2 b1 LSB b0 Se 00 01 10 11 ts :W :W :R :R d a ta r ite r ite ead ead w r ite a d a ta to d a ta to key da SW da n d re a d m o d e d is p la y m e m o r y L E D p o rt ta ta
A d d r e s s in c r e m e n t m o d e s e ttin g s ( d is p la y m e m o r y ) 0 : In c r e m e n ts a d d r e s s a fte r d a ta h a s b e e n w r itte n 1 : F ix e s a d d r e s s T e s t m o d e s e ttin g s 0 : N o rm a l m o d e 1 : T e s t m o d e , u s e r d o n 't u s e
Note: power-on status: normal mode operation and address increment mode are set.
* Address setting commands
These commands set the address of the display memory.
MSB 1 1 b5 b4 b3 b2 b1 LSB b0 A d d re s s (0 0 H ~ 2 F H )
If address 30H or higher is set, data is ignored until a valid address is set. Note: power-on status: the address is set to 00H.
* Display control commands
MSB 1 0 b3 b2 b1 LSB b0 Se 00 00 01 01 10 10 11 11 ts d im 0:Se 1:Se 0:Se 1:Se 0:Se 1:Se 0:Se 1:Se m tp tp tp tp tp tp tp tp in g u ls u ls u ls u ls u ls u ls u ls u ls qu ew ew ew ew ew ew ew ew a id id id id id id id id n tity th to th to th to th to th to th to th to th to
D o n 't c a r e
1 /1 6 2 /1 6 4 /1 6 1 0 /1 1 1 /1 1 2 /1 1 3 /1 1 4 /1 6
6 6 6 6
T u r n s o n /o ff d is p la y 0 : D is p la y o ff ( k e y s c a n c o n tin u e s ) 1 : D is p la y o n
Note: power-on status: 1-16 pulse width is set and the display is turned off. Key scanning will be stopped during power
Rev. 1.10
7
September 18, 2003
HT16511
Timing Diagrams
tf 90% S n /G n 10% tS
W
tr1 ( tr2 )
CS tC
W
tC
W
tC
S
CLK tS
U
th
DI tP DO
HL
tP
LH
Key Scanning and Display Timing
K e y s c a n d a ta S n /K n o u tp u t D ig it 1 D ig it 2 D ig it 3 D ig it n D ig it 1
G 1 o u tp u t 1 /1 6 tD
IS P
G 2 o u tp u t
G 3 o u tp u t
G n o u tp u t 1 fra m e = T (n + 1 )
t@ 500ms
Note: One cycle of key scan consists of two frames, and data of 124 matrixes is stored in RAM.
Rev. 1.10
8
September 18, 2003
HT16511
Serial Communication Format
* Reception (command/data write)
CS
CLK 1 DI
2 b0 b1
3 b2
7 b6
8 b7
* Transmission (data read)
CS CLK DI DO A d a ta r e a d c o m m a n d is s e t 1 b0 2 b1 3 b2 4 b3 5 b4 6 b5 7 b6 8 b7 b0 b1 b2 b3 b4 b5 1 2 3 4 5 6
tW
D a ta is r e a d
DO must be sure to connect an external pull-high resistor to this pin (1kW to 10kW). Note: When data is read, a wait time tW of 1ms is necessary.
* Updating display memory by incrementing address
CS
C LK DI C om m and 1 C om m and 2 C om m and 3 D a ta 1 D a ta n C om m and 4
Note: Command 1: sets display mode Command 2: sets data Command 3: sets address Data 1 to n: transfers display data (48 bytes max.) Command 4: controls display
* Updating specific addresses
CS
CLK DI Com m and 1 Com m and 2 D a ta Com m and 2 D a ta n
Note: Command 1: sets data Command 2: sets address Data: display data
Rev. 1.10
9
September 18, 2003
HT16511
Application Circuits
R7 R8 R9 R10
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
V DD (5 V ) VDD R
OSC
D12 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 VFD Ef
K0
K1
K2
K3
S 1 /K 1
S 2 /K 2
S 3 /K 3
S 4 /K 4
S 5 /K 5
S 6 /K 6
S 7 /K 7
S 8 /K 8
S 9 /K 9 S 1 0 /K 1 0 S 1 1 /K 1 1 S 1 2 /K 1 2
OSC CS CLK DI S 1 3 /G 1 6 ~ S 2 0 /G 9
H T16511
MCU R1
VDD (5 V )
G 1~G 8
DO
LED0 VDD (5 V ) R2
LED1 R3
LED2 R4 R5
LED3 R6
LED4
SW 0
SW 1
SW 2
SW 3
VSS
VEE
-3 0 V
Note:
ROSC=51kW for oscillator resistor R1=1~10kW for external pull-high resistor R2~R6=750W~1.2kW R7~R10=10kW for external pull-low resistor D1~D12=1N4001 Ef=Filament voltage for VFD
Rev. 1.10
10
September 18, 2003
HT16511
Package Information
52-pin QFP (1414) Outline Dimensions
C D 39 27 G H
I 40 26 F A B E
52
14 K J 1 13
Symbol A B C D E F G H I J K a
Dimensions in mm Min. 18.80 13.90 18.80 13.90 3/4 3/4 2.50 3/4 3/4 0.73 0.10 0 Nom. 3/4 3/4 3/4 3/4 0.65 0.40 3/4 3/4 0.10 3/4 3/4 3/4 Max. 19.20 14.10 19.20 14.10 3/4 3/4 3.10 3.40 3/4 1.03 0.20 7
Rev. 1.10
11
September 18, 2003
HT16511
Holtek Semiconductor Inc. (Headquarters) No.3, Creation Rd. II, Science Park, Hsinchu, Taiwan Tel: 886-3-563-1999 Fax: 886-3-563-1189 http://www.holtek.com.tw Holtek Semiconductor Inc. (Sales Office) 4F-2, No. 3-2, YuanQu St., Nankang Software Park, Taipei 115, Taiwan Tel: 886-2-2655-7070 Fax: 886-2-2655-7373 Fax: 886-2-2655-7383 (International sales hotline) Holtek Semiconductor (Shanghai) Inc. 7th Floor, Building 2, No.889, Yi Shan Rd., Shanghai, China Tel: 021-6485-5560 Fax: 021-6485-0313 http://www.holtek.com.cn Holtek Semiconductor (Hong Kong) Ltd. Block A, 3/F, Tin On Industrial Building, 777-779 Cheung Sha Wan Rd., Kowloon, Hong Kong Tel: 852-2-745-8288 Fax: 852-2-742-8657 Holmate Semiconductor, Inc. 46712 Fremont Blvd., Fremont, CA 94538 Tel: 510-252-9880 Fax: 510-252-9885 http://www.holmate.com Copyright O 2003 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holteks products are not authorized for use as critical components in life support devices or systems. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw.
Rev. 1.10
12
September 18, 2003

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